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FEATURES

LTC6081/LTC6082 Precision Dual/Quad CMOS Rail-to-Rail Input/ Output Amplifiers DESCRIPTION
The LTC(R)6081/LTC6082 are dual/quad low offset, low drift, low noise CMOS operational amplifiers with rail-to-rail input/output swing. The 70V maximum offset, 1pA input bias current, 120dB open loop gain and 1.3VP-P 0.1Hz to 10Hz noise make it perfect for precision signal conditioning. The LTC6081/ LTC6082 features 100dB CMRR and 98dB PSRR. Each amplifier consumes only 330A of current on a 3V supply. The 10-lead DFN has an independent shutdown function that reduces each amplifier's supply current to 1A. LTC6081/LTC6082 is specified for power supply voltages of 3V and 5V from -40C to 125C. The dual LTC6081 is available in 8-lead MSOP and 10-lead DFN10 packages. The quad LTC6082 is available in 16-lead SSOP and DFN packages.
, LTC, LT and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Maximum Offset Voltage: 70V (25C) Maximum Offset Drift: 0.8V/C Maximum Input Bias: 1pA (25C) 40pA (TA 85C) Open Loop Voltage Gain: 120dB Typ Gain Bandwidth Product: 3.6MHz CMRR: 100dB Min PSRR: 98dB Min 0.1Hz to 10Hz Noise: 1.3VP-P Supply Current: 330A Rail-to-Rail Inputs and Outputs Unity Gain Stable 2.7V to 5.5V Operation Voltage Dual LTC6081 in 8-Lead MSOP and 10-Lead DFN10 Packages; Quad LTC6082 in 16-Lead SSOP and DFN Packages
APPLICATIONS

Photodiode Amplifier Strain Gauge High Impedance Sensor Amplifier Microvolt Accuracy Threshold Detection Instrumentation Amplifiers Thermocouple Amplifiers
TYPICAL APPLICATION
Shock Sensor Amplifier (Accelerometer)
30 8.2pF 2M MURATA PKGS-00LD 770pF 0 SENSOR 1G 3.9pF 2M 3.9pF NUMBER OF AMPLIFIERS (OUT OF 100) V+ 0.1F 25 20 15 10 5 0 -0.20
VOS Drift Histogram
LTC6081MS8 TA = -40C TO 125C VS = 3V VCM = 0.5V
+
1/2 LTC6081
-
1M V- 0.1F 1M 10k 47pF
VOUT = 109mV/g BW ~ 2.2kHz
60812 TA01
-0.10
0 0.10 VOSDRIFT (V/C)
0.20
0.30
60812 TA01b
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LTC6081/LTC6082 ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (V+ to V-) ...................................6V Input Voltage...................................................... V- to V+ Output Short Circuit Duration (Note 2) ............ Indefinite Operating Temperature Range (Note 3) LTC6081C, LTC6082C .......................... -40C to 85C LTC6081I, LTC6082I ............................ -40C to 85C LTC6081H, LTC6082H........................ -40C to 125C (H Temperature Range Not Available in DFN Package)
Specified Temperature Range (Note 4) LTC6081C, LTC6082C .............................. 0C to 70C LTC6081I, LTC6082I ............................ -40C to 85C LTC6081H, LTC6082H........................ -40C to 125C Junction Temperature DFN Packages ................................................... 125C All Other Packages ............................................ 150C Storage Temperature Range DFN Packages .................................... -65C to 125C All Other Packages ............................. -65C to 150C Lead Temperature (Soldering, 10 Sec) .................. 300C
PIN CONFIGURATION
TOP VIEW OUTA -INA +INA V- SHDN_A 1 2 3 4 5
A B
10 V + 9 OUTB 8 -INB 7 +INB 6 SHDN_B OUTA -INA +INA V- 1 2 3 4
TOP VIEW
A B
8 7 6 5
V+ OUTB -INB +INB
DD PACKAGE 10-LEAD (3mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 43C/W UNDERSIDE METAL CONNECTED TO V- TOP VIEW OUTA -INA +INA V+ +INB -INB OUTB NC 1 2 3 4 5 6 7 8
B C A D
MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150C, JA = 200C/W
TOP VIEW 16 OUTD 15 -IND 14 +IND 13 V - 12 +INC 11 -INC 10 OUTC 9 NC OUTA -INA +INA V+ +INB -INB OUTB NC 1 2 3 4 5 6 7 8
B C A D
16 OUTD 15 -IND 14 +IND 13 V - 12 +INC 11 -INC 10 OUTC 9 NC
DHC PACKAGE 16-LEAD (5mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 43C/W UNDERSIDE METAL CONNECTED TO V-
GN PACKAGE 16-LEAD PLASTIC SSOP TJMAX = 150C, JA = 110C/W
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LTC6081/LTC6082 ORDER INFORMATION
LTC6081 C DD # TR PBF LEAD FREE DESIGNATOR PBF = Lead Free Blank = Lead Tin Lead Finish TAPE AND REEL TR = Tape and Reel Blank = Bulk NUMBER SIGN Required before Tape and Reel and Lead Free Orders PACKAGE TYPE DD = 10-Lead (3mm x 3mm) Plastic DFN DHC = 16-Lead (5mm x 3mm) Plastic DFN GN = 16-Lead Plastic SSOP MS8 = 8-Lead Plastic MSOP TEMPERATURE GRADE C = Commercial Temperature Range (0C to 70C) I = Industrial Temperature Range (-40C to 85C) H = High Temperature Range (-40C to 125C) (H grade not available for DD or DHC package) PRODUCT PART NUMBER LTC6081 (Precision Dual Amplifier) LTC6082 (Precision Quad Amplifier) Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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LTC6081/LTC6082 ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER VOS Offset Voltage CONDITIONS LTC6081MS8, LTC6082GN LTC6081MS8, LTC6082GN LTC6081DD, LTC6082DHC LTC6081DD, LTC6082DHC VCM = 0.5V, 2.5V VCM = 0.5V, 2.5V VCM = 0.5V, 2.5V VCM = 0.5V, 2.5V

The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Test conditions are V+ = 3V, V- = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES MIN -70 -90 -70 -90 0.2 0.2
H SUFFIX MIN -70 -90 TYP MAX 70 90 UNITS V V V V V/C pA pA pA pA nV/Hz VP-P fA/Hz V+ 3 7 95 86 93 86 98 96 -35 -350 105 100 105 100 110 1 V pF pF dB dB dB dB dB dB mV mV mV 40 360 110 15 15 120 mV mV mV dB mA mA 1 2.5 1.5 3.6 70 6 V/s MHz MHz Deg s 400 460 A A A A 2.7 -120 5.5 V dB
TYP
MAX 70 90 70 90 0.8 1 40 15
VOS T Input Offset Voltage Drift (Note 5) IB IOS en In Input Bias Current (Note 6) Input Offset Current
0.2 0.2 0.1
0.8 1 500 100
0.1
Input Referred Noise Input Noise Current Density (Note 7) Input Common Mode Range
Noise Density at f = 1kHz Integrated Noise From 0.1Hz to 10Hz
13 1.3 0.5
13 1.3 0.5 V+ V-
V- 3 7
CDIFF CCM CMRR
Differential Input Capacitance Common Mode Input Capacitance Common Mode Rejection Ratio VCM = 0V to 1.5V VCM = 0V to 1.5V VCM = 0V to 3V VCM = 0V to 3V

95 88 93 88 98 96 -32 -320
105 100 105 100 110 1
PSRR VOUT
Power Supply Rejection Ratio VS = 2.7V to 5.5V Output Voltage, High, Either Output Pin Output Voltage, Low, Either Output Pin (Referred to V-) No Load ISOURCE = 0.5mA ISOURCE = 5mA No Load ISINK = 0.5mA ISINK = 5mA RLOAD = 10k, 0.5V < VOUT < 2.5V Source Sink AV = 1 RL = 100k RL = 10k AV = 1, 1V Step No Load
1 33 300 110 17 17 1
1
AVOL ISC SR GBW 0 tS IS
Large-Signal Voltage Gain Output Short-Circuit Current Slew Rate Gain-Bandwidth Product (fTEST = 50kHz) Phase Margin Settling Time 0.1% Supply Current (Per Amplifier) Shutdown Current (Per Amplifier)
120
2.5 1.8
3.6 70 6 330 400 435 2
330
Shutdown, VSHDN 0.8V Guaranteed by the PSRR Test fs = 10kHz, RL = 10k
0.5

VS
Supply Voltage Range Channel Separation
2.7 -120
5.5
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LTC6081/LTC6082 ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER Shutdown Logic THD tON tOFF Total Harmonic Distortion Turn-On Time Turn-Off Time SHDN Pin Current CONDITIONS SHDN High SHDN Low f = 10kHz, V+ = 3V, VOUT = 1VP-P, RL = 10k VSHDN = 0.8V to 2V VSHDN = 2V to 0.8V VSHDN = 0V
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Test conditions are V+ = 3V, V- = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES MIN

H SUFFIX MIN 2 TYP MAX 0.8 -90 10 2 2 UNITS V V dB s s A
TYP
MAX 0.8
2 -90 10 2
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Test conditions are V+ = 5V, V- = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES SYMBOL PARAMETER VOS Offset Voltage CONDITIONS LTC6081MS8, LTC6082GN LTC6081MS8, LTC6082GN LTC6081DD, LTC6082DHC LTC6081DD, LTC6082DHC VCM = 0.5V VCM = 0.5V VCM = 0.5V VCM = 0.5V

H SUFFIX MIN -70 -90 TYP MAX 70 90 UNITS V V V V V/C pA pA pA pA nV/Hz VP-P fA/Hz V+ 3 7 100 94 86 98 96 -25 -220 110 110 95 110 1 V pF pF dB dB dB dB dB mV mV mV 32 240 110 120 mV mV mV dB
MIN -70 -90 -70 -90
TYP
MAX 70 90 70 90
VOS T Input Offset Voltage Drift (Note 8) IB IOS en In Input Bias Current
0.2 0.2
0.8
0.2 0.2
0.8
40 0.1 0.1 15 13 1.3 0.5 13 1.3 0.5 V+ 3 7 V-
500 100
Input Offset Current
Input Referred Noise Input Noise Current Density (Note 7) Input Common Mode Range
f = 1kHz 0.1Hz to 10Hz
V-
CDIFF CCM CMRR
Differential Input Capacitance Common Mode Input Capacitance Common Mode Rejection Ratio VCM = 0V to 3.5V VCM = 0V to 3.5V VCM = 0V to 5V

100 95 86 98 96 -24 -200
110 110 95 110 1
PSRR VOUT
Power Supply Rejection Ratio VS = 2.7V to 5.5V Output Voltage, High, Either Output Pin (Referred to V+) Output Voltage, Low, Either Output Pin (Referred to V-) No Load ISOURCE = 0.5mA ISOURCE = 5mA No Load ISINK = 0.5mA ISINK = 5mA RLOAD = 10k, 0.5V < VOUT < 4.5V
1 27 210 110 120
1
AVOL
Large-Signal Voltage Gain
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LTC6081/LTC6082 ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER ISC SR GBW 0 tS IS Output Short-Circuit Current Slew Rate Gain-Bandwidth Product (fTEST = 50kHz) Phase Margin Settling Time 0.1% Supply Current (Per Amplifier) Shutdown Current (Per Amplifier) VS Supply Voltage Range Channel Separation Shutdown Logic THD tON tOFF Total Harmonic Distortion Turn-On Time Turn-Off Time SHDN Pin Current CONDITIONS Source Sink AV = 1 RL = 100k RL = 10k AV = 1, 1V Step No Load

The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Test conditions are V+ = 5V, V- = 0V, VCM = 0.5V unless otherwise noted.
C, I SUFFIXES MIN 24 24 1 2.5 1.8 3.5 70 6 340

H SUFFIX MIN 21 21 1 2.5 1.5 3.5 70 6 TYP MAX UNITS mA mA V/s MHz MHz Deg s 425 490 A A A 2.7 -120 3.5 5.5 V dB 1.2 -90 10 2 2 V V dB s s A
TYP
MAX
425 465 6
340
Shutdown, VSHDN 1.2V Guaranteed by the PSRR Test fs = 10kHz, RL = 10k SHDN High SHDN Low f = 10kHz, V+ = 5V, VOUT = 2VP-P, RL = 10k VSHDN = 1.2V to 3.5V VSHDN = 3.5V to 1.2V VSHDN = 0V
2.7 -120 3.5
5.5

1.2 -90 10 2
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply voltage and how many amplifiers are shorted. Note 3: The LTC6081C/LTC6082C and LTC6081I/LTC6082I are guaranteed functional over the operating temperature range of -40C to 85C. The LTC6081H/LTC6082H are guaranteed functional over the operating temperature range of -40C to 125C. Note 4: The LTC6081C/LTC6082C are guaranteed to meet specified performance from 0C to 70C. The LTC6081C/LTC6082C are designed,
characterized and expected to meet specified performance from -40C to 85C but are not tested or QA sampled at these temperatures. The LTC6081I/LTC6082I are guaranteed to meet specified performance from -40C to 85C. The LTC6081H/LTC6082H are guaranteed to meet specified performance from -40C to 125C. Note 5: Input offset drift is computed from the limits of the VOS test divided by the temperature range. This is a conservative estimate of worst case drift. Consult the Typical Performance Characteristics section for more information on input offset drift. Note 6: IB guaranteed by the VS = 5V test. Note 7: Current noise is calculated from In = 2qIB, where q = 1.6 * 10-19 coulomb. Note 8: VOS drift is guaranteed by the VS = 3V test.
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LTC6081/LTC6082 TYPICAL PERFORMANCE CHARACTERISTICS
VOS Drift Histogram
30 NUMBER OF AMPS (OUT OF 100) 25 20 15 10 5 0 -0.20 NUMBER OF AMPS (OUT OF 100) LTC6081MS8 TA = -40C TO 125C VS = 3V VCM = 0.5V 25
VOS Drift Histogram
LTC6081DFN TA = -40C TO 125C VS = 3V VCM = 0.5V VOS (V) -0.20 -0.10 0 0.10 VOSDRIFT (V/C) 0.20
60812 G02
VOS vs Temperature
25 20 15 10 LTC6081MS8 VS = 3V VCM = 0.5V REPRESENTATIVE PARTS
20
15
5 0 -5
10
5
-10 -15
-0.10
0.10 VOSDRIFT (V/C)
0
0.20
0.30
60812 G01
0 -0.30
-20 -50 -30 -10 10 30 50 70 90 110 130 TEMPERATURE (C)
60812 G03
VOS Histogram
18 16 NUMBER OF AMPS (OUT OF 100) 14 12 VOS (V) 10 8 6 4 2 0 -9.5 -5.5 -1.5 2.5 VOS (V) 6.5 10.5
60812 G04
VOS vs VCM
40 30 20 10 0 VS = 3V TA = 25C REPRESENTATIVE PARTS 140 120 100 80 VOS (V) 0 0.5 1.0 1.5 2.0 VCM (V) 2.5 3.0 60 40 20 0 -20 -40
VOS vs VCM
VS = 5V TA = 25C REPRESENTATIVE PARTS
LTC6081MS8 TA = 25C VS = 3V VCM = 0.5V
-10 -20 -30 -40
0
1
2 VCM (V)
3
4
5
60812 G06
60812 G05
VOS vs Output Current
200 150 100 VOS (V) 50 TA = 55C 0 -50 -100 SOURCING CURRENT -6 -4 SINKING CURRENT 4 6
60812 G07
Warm-Up Drift vs Time
25 CHANGE IN OFFSET VOLTAGE (V) 110 TA = 25C VCM = 0.5V NOISE VOLTAGE (nV/Hz) VS = 5V 100 90 80 70 60 50 40 30 20 10 -5 0 5 10 15 20 25 30 35 40 45 50 55 60 TIME AFTER POWER UP (s)
60812 G08
Noise Voltage vs Frequency
TA = 25C
VS = 5V VCM = 2.5V
TA = 125C
20 15 10 VS = 3V 5 0
TA = 25C
VS = 5V VCM = 0.5V VS = 3V VCM = 0.5V 1 10 100 1k FREQUENCY (Hz) 10k 100k
60812 G09
0
0 2 -2 OUTPUT CURRENT (mA)
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LTC6081/LTC6082 TYPICAL PERFORMANCE CHARACTERISTICS
Noise Voltage vs Frequency
300 280 260 240 220 200 180 160 140 120 100 80 60 40 20 0 1 10 VS = 3V TA = 25C OUTPUT NOISE (500nV/DIV)
0.1Hz to 10Hz Output Voltage Noise
TA = 25C VS = 3V VCM = 0.5V OUTPUT NOISE (1V/DIV) 5 10 15 20 25 30 35 40 45 50 TIME (s)
60812 G11
0.1Hz to 10Hz Output Voltage Noise
TA = 25C VS = 3V VCM = 2.5V
NOISE VOLTAGE (nV/Hz)
PMOS INPUTS VCM = 0.5V
NMOS INPUTS VCM = 2.5V
100 1k FREQUENCY (Hz)
10k
100k
60812 G10
0
0
5
10 15 20 25 30 35 40 45 50 TIME (s)
60812 G12
Input Bias Current vs Temperature
1000 VS = 5V VCM = 2.5V 40 30 20 10 IBIAS (pA) 0 -10 -20 1 -30 -40 0.1 20 40 60 80 100 TEMPERATURE (C) 120 140 -50
IBIAS vs VCM
LTC6081MS8 VS = 5V 500 400 300 200 TA = 70C IBIAS (pA) 100 0
IBIAS vs VCM
LTC6081MS8 VS = 5V TA = 125C
INPUT BIAS CURRENT (pA)
100
10
-100 -200 -300 -400 -500
TA = 85C
0
60812 G13
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VCM (V)
60812 G14
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VCM (V)
60812 G15
Large Signal Transient
Small Signal Transient
55 50 45 OVERSHOOT (%) 40 35 30 25 20 15 10 5 0
Overshoot vs CL
TA = 25C VS = 3V VCM = 0.5V AV = 1
0.5V/DIV
GND
20mV/DIV
GND
AV = 10
200s/DIV TA = 25C VS = 1.5V RL = 10k CL = 100pF
60812 G16
20s/DIV TA = 25C VS = 1.5V RL = 10k CL = 100pF
60812 G17
10
100 1000 CAPACITIVE LOAD (pF)
10000
60812 G18
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LTC6081/LTC6082 TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Temperature
390 370 SUPPLY CURRENT (A) 350 330 310 290 270 250 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
60812 G19
Supply Current vs Time
1600 TA = 25C NO BYPASS CAPACITOR 4 1000
Output Impedance vs Frequency
VCM = 0.5V PER AMPLIFIER
VS = 5V SUPPLY CURRENT OPAMP (A) 1200
3 SUPPLY VOLTAGE
OUTPUT IMPEDANCE ()
100 AV = 100 10 AV = 10 1 AV = 1 0.1 VS = 3V VCM = 0.5V TA = 25C 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M
SUPPLY VOLTAGE (V)
VS = 3V
800
2
400 SUPPLY CURRENT 0 0 100 200 300 400 TIME (s)
60812 G20
1
0 500
0.01 100
60812 G21
Open Loop Gain
20 10 INPUT VOLTAGE (V) INPUT VOLTAGE (V) 0 -10 -20 RL = 2k -30 -40 0 0.5 1.0 1.5 2.0 OUTPUT VOLTAGE (V) 2.5 3.0 RL = 100k RL = 10k VS = 3V TA = 25C 20 10 0 -10 -20 -30 -40
Open Loop Gain
VS = 5V TA = 25C 60
Open Loop Gain vs Frequency
RL = 10k RL = 100k PHASE RL = 100k GAIN (dB) RL = 10k RL = 2k 20 270 180 90 PHASE (DEG) 0 -90 GAIN -20 VS = 5V VCM = 0.5V TA = 25C 1k 10k 1M 100k FREQUENCY (Hz) 10M
40
0
-180 -270 -360 100M
60812 G24
-40 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 OUTPUT VOLTAGE (V)
60812 G23
60812 G22
Open Loop Gain vs Frequency
60 PHASE 40 0 PHASE (DEG) CMRR (dB) GAIN (dB) 20 -90 -180 GAIN -20 VS = 5V VCM = 0.5V TA = 25C CL = 200pF 1k 10k 1M 100k FREQUENCY (Hz) 10M -270 -360 -450 100M
60812 G25
CMRR vs Frequency
180 90 120 100 80 60 40 20 0 -20 100 PSRR (dB) VS = 5V VCM = 0.5V TA = 25C RL = 1k 120 100 80 60 40 20 0
PSRR vs Frequency
VS = 5V VCM = 0.5V TA = 25C
RL = 10k RL = 100k
0
-40
1k
10k 100k 1M FREQUENCY (Hz)
10M
100M
-20 100
1k
10k 100k 1M FREQUENCY (Hz)
10M
100M
60812 G26
60812 G27
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LTC6081/LTC6082 TYPICAL PERFORMANCE CHARACTERISTICS
Channel Separation vs Frequency
0 -20 CHANNEL SEPARATION (dB) - 40 - 60 - 80 -100 -120 -140 100 OUTPUT VOLTAGE SWING (V) (REFERRED TO SUPPLY VOLTAGE) VS = 3V VCM = 0.5V RL = 10k +VS VS = 3V +VS -0.5 V = 0.5V CM +VS -1.0 +VS -1.5 +VS -2.0 -VS 2.0 -VS 1.5 -VS 1.0 -VS 0.5 -VS 0 0.01 TA = 125C TA = 25C TA = -55C SINK DISTORTION (dBc) SOURCE
Output Voltage Swing vs Load Current
-20 -30 -40 -50 -60 -70 -80 -90 100
60789 G29
Distortion vs Frequency
VS = 5V AV = 1 RL = 10k VOUT = 2VP-P 2ND 3RD
1k
10k 100k 1M FREQUENCY (Hz)
10M
100M
1 10 0.1 LOAD CURRENT (mA)
-100 1 10 100 FREQUENCY (kHz) 1000
60812 G30
60812 G28
PIN FUNCTIONS
OUT: Amplifier Output -IN: Inverting Input +IN: Noninverting Input V+: Positive Supply V-: Negative Supply SHDN_A: Shutdown Pin of Amplifier A, active low and only valid for LTC6081DD. An internal current source pulls the pin to V+ when floating. SHDN_B: Shutdown Pin of Amplifier B, active low and only valid for LTC6081DD. An internal current source pulls the pin to V+ when floating. NC: Not internally connected. Exposed Pad: Connected to V-.
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LTC6081/LTC6082 APPLICATIONS INFORMATION
Preserving Input Precision Preserving input accuracy of the LTC6081/LTC6082 requires that the application circuit and PC board layout do not introduce errors comparable or greater than the 5V typical offset of the amplifiers. Temperature differentials across the input connections can generate thermocouple voltages of 10's of microvolts so the connections to the input leads should be short, close together and away from heat dissipating components. Air current across the board can also generate temperature differentials. The extremely low input bias currents (0.1pA typical) allow high accuracy to be maintained with high impedance sources and feedback resistors. Leakage currents on the PC board can be higher than the input bias current. For example, 10G of leakage between a 5V supply lead and an input lead will generate 500pA! Surround the input leads with a guard ring driven to the same potential as the input common mode voltage to avoid excessive leakage in high impedance applications. Capacitive Load LTC6081/LTC6082 can drive capactive load up to 200pF in unity gain. The capacitive load driving capability increases as the amplifier is used in higher gain configurations. A small series resistance between the output and the load further increases the amount of capacitance the amplifier can drive. SHDN Pins Pins 5 and 6 are used for power shutdown on the LTC6081 in the DD package. If they are floating, internal current sources pull Pins 5 and 6 to V+ and the amplifiers operate normally. In shutdown, the amplifier output is high impedance, and each amplifier draws less than 2A current. Rail-to-Rail Input The input stage of LTC6081/LTC6082 combines both PMOS and NMOS differential pairs, extending its input common mode voltage range to both positive and negative supply voltages. At high input common mode range, the NMOS pair is on. At low common mode range, the PMOS pair is on. The transition happens when the common voltage is between 1.3V and 0.9V below the positive supply. LTC6081 has better low frequency noise performance with PMOS input on due to its lower flicker noise (see Voltage Noise vs Frequency and 0.1Hz to 10Hz Input Voltage Noise in Typical Performance Characteristics). Thermal Hysteresis Figure 1 shows the input offset voltage hysteresis of the LTC6081IMS8 for 3 thermal cycles from -45C to 90C. The typical offset shift is 4V. The data was taken with the ICs in stress free sockets. Mounting to PC boards may cause additional hysteresis due to mechanical stress. The LTC6081 will meet offset voltage specifications in the electrical characteristics table even after 15V of additional error from thermal hysteresis.
0.30 VOS CHANGE AFTER 3 THERMAL CYCLES VCM = 0.5V + 0.25 V = 3V 300 UNITS 0.20 0.15 0.10 0.5 0
PERCENTAGE OF UNITS
-15 -12 -9 -6 -3 0 3 6 VOS CHANGE (V)
9
12 15
60812 F01
Figure 1. VOS Thermal Hysteresis of LTC6081MS8
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LTC6081/LTC6082 APPLICATIONS INFORMATION
PC Board Layout Mechanical stress on a PC board and soldering-induced stress can cause the VOS and VOS drift to shift. The DD and DHC packages are more sensitive to stress. A simple way to reduce the stress-related shifts is to mount the IC near the short edge of the PC board, or in a corner. The board edge acts as a stress boundary, or a region where the flexure of the board is minimum. The package should always be mounted so that the leads absorb the stress and not the package. The package is generally aligned with the leads perpendicular to the long side of the PC board (see Figure 2). The most effective technique to relieve the PC board stress is to cut slots in the board around the op amp. These slots can be cut on three sides of the IC and the leads can exit on the fourth side. Figure 2 shows the layout of a LTC6081DD with slots at three sides.
LONG DIMENSION
SLOTS
60812 F02
Figure 2. Vertical Orientation of LTC6081DD with Slots
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LTC6081/LTC6082 SIMPLIFIED SCHEMATIC
Simplified Schematic of the Amplifier
V+ R1 M10 M11 C1 R2 M8 I1
-
+
1A V
-
I2 D4
V+ VBIAS M5
A1 V+ D7 M1 M2 V- D6 V- D5 A2 M6 M7 OUTPUT CONTROL D8 OUT
+IN D3 V+
V+ D2 SHDN D1 V- V-
-IN
BIAS GENERATION NOTE: SHDN IS ONLY AVAILABLE IN THE DFN10 PACKAGE
+
-
V- M3 M4
C2 M9 R3 R4
60812 SS
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LTC6081/LTC6082 TYPICAL APPLICATIONS
Low Side Current Sense
100k
15pF V+ VDD
I
LOAD
-
1/2 LTC6081 VOUT = RSH * I * 101 eNOISE = 3VP-P, RTI BW ~ 1kHz
+
RSH 1k
60812 TA03
Two Op-Amp Instrumentation Amplifier
GAIN TRIM 1.96k 100k CMRR TRIM 976k 50k - VIN + V+ 0.1F 1M 100k
-
1/2 LTC6081 100k
+
-
1/2 LTC6081 VOUT = 1011 * VIN
+
V- 0.1F
60812 TA04
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14
LTC6081/LTC6082 TYPICAL APPLICATIONS
Thermocouple Amplifier
5V 0.1F 1M 1F 5V LT1025 K R- 10k 100pF SENSOR: OMEGA 5TC-TT-K-30-36 K-TYPE THERMOCOUPLE 1M RESISTORS PROTECT CIRCUIT TO 350V WITH NO PHASE REVERSAL OF AMPLIFIER OUTPUT 1pA MAX IBIAS TRANSLATES TO 0.05C ERROR 20V VOS 0.5C OFFSET 60812 TA05
+
1/2 LTC6081
1M
-
2.49M
VOUT = 10mV/C 0C TO 500C
Precision Nanoamp Bidirectional Current Source
100k VIN 100
+
1/4 LTC6082
-
1k GAIN TRIM 5k 97.6k 10-TURN 100k 0.1F 2.5V 10m 100 0.01F
1/4 LTC6082
100k 3.9pF
100k 0.1F
1/4 LTC6082
IOUT = -1nA 1nA FOR VIN = -10V 10V TOTAL ERROR <1% (10pA)
-2.5V
60812 TA06
-
+
+ -
LOAD
IOUT
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15
LTC6081/LTC6082 PACKAGE DESCRIPTION
DD Package 10-Lead Plastic DFN (3mm x 3mm)
(Reference LTC DWG # 05-08-1699)
R = 0.115 TYP 6 0.675 0.05 0.38 0.10 10
3.50 0.05 1.65 0.05 2.15 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE PIN 1 TOP MARK (SEE NOTE 6)
3.00 0.10 (4 SIDES)
1.65 0.10 (2 SIDES)
(DD) DFN 1103
5 0.200 REF 0.75 0.05 2.38 0.10 (2 SIDES)
1
0.25 0.05 0.50 BSC
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD
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16
LTC6081/LTC6082 PACKAGE DESCRIPTION
DHC Package 16-Lead Plastic DFN (5mm x 3mm)
(Reference LTC DWG # 05-08-1706)
0.65 0.05 3.50 0.05
1.65 0.05 2.20 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 4.40 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 5.00 0.10 (2 SIDES) R = 0.20 TYP R = 0.115 TYP 9 16 0.40 0.10
3.00 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6)
1.65 0.10 (2 SIDES) PIN 1 NOTCH
(DHC16) DFN 1103
8 0.200 REF 0.75 0.05 4.40 0.10 (2 SIDES)
1 0.25 0.05 0.50 BSC
0.00 - 0.05 NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
BOTTOM VIEW--EXPOSED PAD
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17
LTC6081/LTC6082 PACKAGE DESCRIPTION
GN Package 16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.045 .005 .189 - .196* (4.801 - 4.978) 16 15 14 13 12 11 10 9
.009 (0.229) REF
.254 MIN
.150 - .165 .229 - .244 (5.817 - 6.198) .150 - .157** (3.810 - 3.988)
.0165 .0015
.0250 BSC 1 .015 .004 x 45 (0.38 0.10) .0532 - .0688 (1.35 - 1.75) 23 4 56 7 8 .004 - .0098 (0.102 - 0.249)
RECOMMENDED SOLDER PAD LAYOUT
.007 - .0098 (0.178 - 0.249)
0 - 8 TYP
.016 - .050 (0.406 - 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
.008 - .012 (0.203 - 0.305) TYP
.0250 (0.635) BSC
GN16 (SSOP) 0204
60812f
18
LTC6081/LTC6082 PACKAGE DESCRIPTION
MS8 Package 8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 0.127 (.035 .005)
5.23 (.206) MIN
3.20 - 3.45 (.126 - .136)
0.42 0.038 (.0165 .0015) TYP
0.65 (.0256) BSC
3.00 0.102 (.118 .004) (NOTE 3)
8
7 65
0.52 (.0205) REF
RECOMMENDED SOLDER PAD LAYOUT
DETAIL "A" 0 - 6 TYP 4.90 0.152 (.193 .006) 3.00 0.102 (.118 .004) (NOTE 4)
0.254 (.010) GAUGE PLANE
1 0.53 0.152 (.021 .006) DETAIL "A" 0.18 (.007) SEATING PLANE 0.22 - 0.38 (.009 - .015) TYP 1.10 (.043) MAX
23
4 0.86 (.034) REF
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.65 (.0256) BSC
0.127 0.076 (.005 .003)
MSOP (MS8) 0204
60812f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC6081/LTC6082 TYPICAL APPLICATION
Single Supply Strain Gauge Amplifier
3V 350 10M 9.76M 3.2V 0.1F 500k 0.1F LT1790B 1.25V CMRR TRIM 3V 0.01F 10k 100 100k
350
-
1/2 LTC6081 AV = 1001
+
10M 1/2 LTC6081
-
10M
1.25V
+
SENSOR: OMEGA SG-3/350-LY41 STRAIN GAUGE
60812 TA02
RELATED PARTS
PART NUMBER LT1678/LT1679 LTC2050 LTC2051/LTC2052 LTC2054/LTC2055 LTC6078/LTC6079 LTC6241/LTC6242 LTC6244 DESCRIPTION Dual/Quad Precision Op Amps Zero-Drift Op Amp Dual/Quad Zero-Drift Op Amps Single/Dual Zero-Drift Op Amp Dual/Quad Low Noise Precision CMOS Op Amps Dual/Quad Low Noise CMOS Op Amps Dual 50MHz CMOS Op Amp COMMENTS Low Noise, 2.7V to 36V Operation 2.7V Operation, SOT-23 Package MS8/GN16 Packages Micropower, SOT-23 and DFN Packages Micropower 0.7V/C VOS Drift 18MHz Bandwidth,10V/s Slew Rate Low Noise, Rail-to-Rail Out, MS8 and DFN Packages
60812f
20 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 0807 * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2007

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